1. Field of the Invention
The present invention relates to a static random access memory (SRAM) and a method for manufacturing the same.
2. Description of the Related Art
A static random access memory (SRAM) is designed such that it can always store data on the basis of a circuit employing a latch mode. The SRAM has high-speed operation and low power consumption, and does not need to periodically refresh stored information unlike a dynamic random access memory (DRAM).
In general, the SRAM is composed of two pull-down devices, two access devices, and two pull-up devices, and is divided into three types, a complete complimentary metal oxide semiconductor (CMOS) type, a high load resistor (HLR) type, and a thin film transistor (TFT) type, according to the configuration of the pull-up devices. The full CMOS type SRAM uses p-channel bulk metal oxide semiconductor field effect transistors (MOSFETs) as the pull-down devices. The HLR type SRAM uses polysilicon layers having high resistance as the pull-up devices. The TFT type SRAM uses p-channel polysilicon TFTs as the pull-up devices. Here, the TFT type SRAM can remarkably reduce a cell size, and thus is easily applied to a semiconductor memory used for a memory device only.
The SRAM has various structures, the most popular one of which is the full CMOS type SRAM composed of six transistors. Further, the full CMOS type SRAM employs a p-channel TFT in order to increase integration density of the memory cell due to its wide area. However, due to high resistance of the power supply potential Vcc, the full CMOS type SRAM has a slow operating speed.